phyCORE®-MCF5485 Board Support Package
for TargetOS - RTOS for ColdFire
Blunk Microsystems' board support package for phyCORE®-MCF5485, PHYTEC's single board computer based on Freescale's MCF5485 ColdFire processor, includes the following features:
Performs low level initialization of the MCF5485 including CPU, Communications I/O Subsystem, System Integration Unit (SIU) and SDRAM controller, allowing TargetOS™ applications to boot from external Flash.
Drivers for the MCF5485's dual Fast Ethernet Controllers (FECs). The driver uses the highest negotiable combination of half and full duplex, 10 and 100 Mbps, and implements a zero-copy interface to TargetTCP™, Blunk Microsystems' high performance TCP/IP stack. Minimal time is spent in the FEC interrupt handler. Supports TFTP downloads, FTP transfers, Telnet access to the TargetOS command line monitor, and other TCP/IP applications.
Interrupt-driven and polled-mode drivers for MCF5485 Programmable Serial Controller (PSC) channels PSC0 and PSC1 in UART mode. Supports full-duplex operation of the stream I/O routines (printf(), scanf(), etc.) in the TargetOS Standard C library. The baud rate is set independently for each channel. Default configuration is 8-bit data, 1 stop bit, 1 start bit, and no parity.
Driver for MCF5485 Slice Timer 1 supports the TargetOS 32-bit system timer and the kernel tick interrupt used for task sleeps and system call timeouts. The default tick interrupt frequency is 100 Hz.
Drivers for MCF5485 General Purpose Timers 0-3 allow either periodic or one-time calls to user-provided callback functions after programmed delays. The default resolution is 1 us and the maximum delay is 71.6 min.
Supports the MCF5485 MMU. Accesses to unsupported address ranges are caught and reported to the application as bus errors.
Supports the MCF5485 data and instruction caches. The instruction cache is enabled for all accesses. Data accesses to the SDRAM use copy-back cache mode with imprecise ordering. Flash data accesses are cache inhibited with imprecise ordering. All other data accesses are cache-inhibited with precise ordering. Provides service calls to flush, invalidate, and synchronize the instruction and data caches.
A menu-driven Flash programmer for installing TargetOS boot applications into the external flash. The programmer supports the ELF and S-record formats and accepts input from either a file, UART channel, or TFTP connection. The executable image is written to flash after it is successfully loaded to a RAM buffer.
Uses one block of flash memory to support the TargetOS NVRAM driver interface, providing non-volatile configuration parameters. These parameters, such as startup mode, baud rate, and network configuration, can be displayed and edited via the TargetOS boot menu. Applications can add their own configuration parameters and boot menu entries.
Integrated with CrossStep™/ColdFire, Blunk's IDE for embedded development that includes an integrated project builder, kernel-aware source code debugger, on-chip debug connections for board bring-up and Ethernet debug connections for fast application development.
Royalty-free Platform License. Includes full source code, user's manual, and one year of technical support.